4 resultados para Implementação

em Repositório Institucional da Universidade Tecnológica Federal do Paraná (RIUT)


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This work is part of the Graduate Program in Regional Development of the Federal Technological University of Paraná, Pato Branco campus, the research line Education and Development. The line of research concerns the Regionality and Development. In this study, investigate sought the implementation of the Field Education Curriculum Guidelines in the State of Paraná, whose locus, SEED / PR, the NRE / Pato Branco and Field Schools belonging to the NRE. The theme is to respond to the research problem, to identify the limits and challenges of the implementation process of Rural Education in rural schools in the Regional Center of Pato Branco Education. Exploratory research covers a time frame comprising the years 2002-2014 in order to identify and analyze the documents and perceptions of the subjects that guide the implementation of the field of education in the state of Paraná. The results show that the education field has not yet overcame the challenge of implementing public policies, in particular the field of Education Curriculum Guidelines. In general, the texts point to the concerned school education with the urban environment, in an attempt to solve the problems related to truancy, low school enrollment,flunk, among others. The reality of the field displays more serious such problems, however, is visible the development of proposals in an attempt to achieve definitive solutions to the issues of the field. However, a positive factor is the increase in continuing education courses, some offered by the Department of Education Field Regional Center of Education, others initiatives by the own teacher, which demonstrate the concern in improving their teaching practices, concomitant with need to change the identity of the field school. In this sense, we seek to deepen the discussion in order to demystify the idea that the subject field to be synonymous with poor education, poor quality. Documents such as the Field Operational Guidelines established by the CNE - National Education Council in 2002, the Curriculum Guidelines field developed by SEED - Secretary of State and Education in the State of Paraná in 2004 and established as a public policy in 2010 provide data that allow make a study of public policy and educational field context in order to understand the challenges for the development of an education as culture, ways of life, history, finally, the specificities of the subject field.

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In recent years the photovoltaic generation has had greater insertion in the energy mix of the most developed countries, growing at annual rates of over 30%. The pressure for the reduction of pollutant emissions, diversification of the energy mix and the drop in prices are the main factors driving this growth. Grid tied systems plays an important role in alleviating the energy crisis and diversification of energy sources. Among the grid tied systems, building integrated photovoltaic systems suffers from partial shading of the photovoltaic modules and consequently the energy yield is reduced. In such cases, classical forms of modules connection do not produce good results and new techniques have been developed to increase the amount of energy produced by a set of modules. In the parallel connection technique of photovoltaic modules, a high voltage gain DC-DC converter is required, which is relatively complex to build with high efficiency. The current-fed isolated converters explored in this work have some desirable characteristics for this type of application, such as: low input current ripple and input voltage ripple, high voltage gain, galvanic isolation, feature high power capacity and it achieve soft switching in a wide operating range. This study presents contributions to the study of a high gain and high efficiency DC-DC converter for use in a parallel system of photovoltaic generation, being possible the use in a microinverter or with central inverter. The main contributions of this work are: analysis of the active clamping circuit operation proposing that the clamp capacitor connection must be done on the negative node of the power supply to reduce the input current ripple and thus reduce the filter requirements; use of a voltage doubler in the output rectifier to reduce the number of components and to extend the gain of the converter; detailed study of the converter components in order to raise the efficiency; obtaining the AC equivalent model and control system design. As a result, a DC-DC converter with high gain, high efficiency and without electrolytic capacitors in the power stage was developed. In the final part of this work the DC-DC converter operation connected to an inverter is presented. Besides, the DC bus controller is designed and are implemented two maximum power point tracking algorithms. Experimental results of full system operation connected to an emulator and subsequently to a real photovoltaic module are also given.

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The presence of non-linear loads at a point in the distribution system may deform voltage waveform due to the consumption of non-sinusoidal currents. The use of active power filters allows significant reduction of the harmonic content in the supply current. However, the processing of digital control structures for these filters may require high performance hardware, particularly for reference currents calculation. This work describes the development of hardware structures with high processing capability for application in active power filters. In this sense, it considers an architecture that allows parallel processing using programmable logic devices. The developed structure uses a hybrid model using a DSP and an FPGA. The DSP is used for the acquisition of current and voltage signals, calculation of fundamental current related controllers and PWM generation. The FPGA is used for intensive signal processing, such as the harmonic compensators. In this way, from the experimental analysis, significant reductions of the processing time are achieved when compared to traditional approaches using only DSP. The experimental results validate the designed structure and these results are compared with other ones from architectures reported in the literature.

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This work presents the modeling and FPGA implementation of digital TIADC mismatches compensation systems. The development of the whole work follows a top-down methodology. Following this methodology was developed a two channel TIADC behavior modeling and their respective offset, gain and clock skew mismatches on Simulink. In addition was developed digital mismatch compensation system behavior modeling. For clock skew mismatch compensation fractional delay filters were used, more specifically, the efficient Farrow struct. The definition of wich filter design methodology would be used, and wich Farrow structure, required the study of various design methods presented in literature. The digital compensation systems models were converted to VHDL, for FPGA implementation and validation. These system validation was carried out using the test methodology FPGA In Loop . The results obtained with TIADC mismatch compensators show the high performance gain provided by these structures. Beyond this result, these work illustrates the potential of design, implementation and FPGA test methodologies.